1. Field of the Invention
This invention relates to microelectronic capacitors and, more particularly, to capacitors formed using back-end-of-the-line (BEOL) processes.
2. Description of Background
Capacitors are employed to implement any of a wide variety of functions within electronic circuits. These include resonant circuits, filters, voltage-controlled oscillators, coupling between amplifier stages, and bypassing. Microelectronic capacitors are often fabricated as part of a back-end-of-the-line (BEOL) process. BEOL refers to integrated circuit fabrication steps where components such as transistors, resistors, and diodes are interconnected with wiring on a semiconductor wafer. More specifically, BEOL begins when a first layer of metal is deposited on the wafer. BEOL includes contacts, insulator, metal levels, and bonding sites for chip-to-package connections.
Some characteristics by which capacitors are evaluated include capacitive density, parasitic capacitance to ground, and the extent to which one or more functional parameters are influenced by device orientation. Existing BEOL capacitors have several shortcomings. In a standard BEOL comb capacitor, the device is not symmetric in both directions, leading to orientation-dependent operation, undesired parasitic capacitances, and circuit mismatches. The asymmetric topology can also lead to increased area requirements. Moreover, existing BEOL capacitors have an undesirably large parasitic capacitance associated with the bottommost layers of the capacitor anode coupling to the semiconductor substrate.